Test Interface Board
▶ SPEED MAX 200Mhz
▶ DDR, LPDDR
▶ Min Pitch : 0.35mm
1. Multi-layer, fine pitch PCB design
2. SI & PI simulation
3. parallel testing possible. Max 352
Max Layer |
~18 Layer |
Thickness |
~2.4mm |
Size |
450*570 |
Material |
Polyimide |
Min Pitch |
0.35 mm Pitch |
Option |
- |
Impedance Control |
50ohm [+/- 10%] |
Head Office : 610, 124, Sagimakgol ro, Jungwon gu, Seongnam si, Gyeonggi do, Republic of Korea
Dongtan R&D center : 1806, A, 27, Dongtan cheomdan saneop 1 ro, Hwaseong si, Gyeonggi do, Republic of Korea
TEL : +82-31-784-7060 | FAX : +82-31-784-8894
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